Performant and Flexible On-Board Processing Modules Using Reconfigurable FPGAs
Current and future space missions demand sophisticated on-board data processing functionalities, while low resources consumption remains a constraint. Thus, in-flight reconfigurable architectures are mandatory. Using dynamically reconfigurable FPGAs allows enhancement of on-board processing with unprecedented levels of flexibility, enabling the adaptation of the system regarding functional and fault-tolerance requirements, subjects to change during mission lifetime. Different operational modes can be served, especially for sharing of complex algorithms on limited FPGA resources. For instrument control and data processing of the PHI instrument on the Solar Orbiter mission (SO/PHI), we have partially adapted results of the ESA study for a Dynamically Reconfigurable Processing Module (DRPM) and implemented a flexible, in-flight reconfigurable, power efficient, and radiation tolerant processing module based on Xilinx Virtex-4 SRAM-based FPGAs. While these and the rad-hard Virtex-5 FPGAs have been used for many current space missions, they provide only insufficient logic resources and embedded memory for future usage. Instead, the Kintex Ultrascale XQRKU060 has become a state-of-the-art rad-tolerant FPGA implementation. As the Xilinx Zynq Ultrascale+ shows, integration of dedicated processors is presently used already for military and commercial space applications. After having demonstrated the usage of in-flight reconfigurability for SRAM-based FPGAs on SO/PHI, we have developed a universal platform for high performance on-board data processing, based on cPCI Serial Space standard and state-of-the-art Xilinx Zynq Ultrascale+ MPSoC device on a single board (3U). The cPCI Serial Space standard guarantees the modular extensibility of the system. The board provides two banks of 64 Gibit DDR3-SDRAM memory and TMR NOR-Flash for configuration and SW code, together with various interfaces, like PCIe, SpaceWire, and Ethernet. Optionally, this could be expanded to control NAND-flash mass memory or implemented with an EV-MPSoC ...