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Many researchers have developed applications using transactional memory (TM) with the purpose of benchmarking different implementations, and studying whether or not TM is easy to use. However, comparatively little has been done to provide general-purpose tools for profiling and optimizing programs which use transactions. In this paper we introduce a series of profiling and optimization techniques for TM applications. The profiling techniques are of three types: (i) techniques to identify multiple potential conflicts from a single program run, (ii) techniques to identify the data structures involved in conflicts by using a symbolic path through the heap, rather than a machine address, and (iii) visualization techniques to summarize how threads spend their time and which of their transactions conflict most frequently. Altogether they provide in-depth and comprehensive information about the wasted work caused by aborting transactions. To reduce the contention between transactions we suggest several TM specific optimizations which leverage nested transactions, transaction checkpoints, early release and etc. To examine the effectiveness of the profiling and optimization techniques, we provide a series of illustrations from the STAMP TM benchmark suite and from the synthetic WormBench workload. First we analyze the performance of TM applications using our profiling techniques and then we apply various optimizations to improve the performance of the Bayes, Labyrinth and Intruder applications. We discuss the design and implementation of the profiling techniques in the Bartok-STM system. We process data offline or during garbage collection, where possible, in order to minimize the probe effect introduced by profiling. © 2011 Springer Science+Business Media, LLC. ; This work is supported by the cooperation agreement between the Barcelona Supercomputing Center National Supercomputer Facility and Microsoft Research, by the Ministry of Science and Technology of Spain and the European Union (FEDER funds) under contract TIN2007-60625, by the European Network of Excellence on High-Performance Embedded Architecture and Compilation (HiPEAC) and by the European Commission FP7 project VELOX (216852). Ferad Zyulkyarov is also supported by a scholarship from the Government of Catalonia. ; Peer Reviewed

The Graph500 benchmark attempts to steer the design of High-Performance Computing sys-tems to maximize the performance under memory-constricted application workloads. A realisticsimulation of such benchmarks for architectural research is challenging due to size and detail lim-itations. By contrast, synthetic traffic workloads constitute one of the least resource-consumingmethods to evaluate the performance. In this work, we provide a simulation tool for networkarchitects that need to evaluate the suitability of their interconnect for BigData applications. Ourdevelopment is a low computation- and memory-demanding synthetic traffic model that emu-lates the behavior of the Graph500 communications and is publicly available in an open-sourcenetwork simulator. The characterization of network traffic is inferred from a profile of several exe-cutions of the benchmark with different input parameters. We verify the validity of the equationsin our model against an execution of the benchmark with a different set of parameters. Further-more, we identify the impact of the node computation capabilities and network characteristics inthe execution time of the model in a Dragonfly network. ; The authors would like to thank the European HiPEAC Network of Excellence for partially funding this work through a Collaboration Grant.They would like to thank as well Cristóbal Camarero for his help. This work has been supported by the Spanish Ministry of Education, FPUgrants FPU13/00337 and FPU14/02253; the Spanish Ministry of Economy, Industry, and Competitiveness under contract TIN2016-76635-C2-2-R(AEI/FEDER, UE); and by the Mont-Blanc project. The Mont-Blanc project has received funding from the European Union's Horizon 2020 researchand innovation program under grant agreement 671697. Santander Supercomputacion support group from the University of Cantabria providedaccess to the Altamira Supercomputer at the Institute of Physics of Cantabria (IFCA-CSIC).