PaCoVNE: Power Consumption Aware Coordinated VNE with Delay Constraints

Open Access

Abstract

[ES] This paper introduces a more efficient embedding approach, called power consumption aware and coordinated VNE heuristic, denoted as (PaCoVNE). It embeds both virtual nodes and edges, simultaneously, and within one stage, while satisfying: CPU, BW constraints, minimizes power consumption of whole substrate network, and considers end-to- end delay as a major constraint. Performance of the new heuristic was compared to the energy aware algorithm OCA/EA-RH, for off-line scenario using homogeneous configurations, with and without end-to-end delay. The paper also presents simulation results for the two configurations once without end-to-end delay, and also when it was included. ; This work has been partially supported by the Ministerio de Econom´ıa y Competitividad of the Spanish Government under project TEC2016-76795- C6-1-R and AEI/FEDER, UE. ; Hejja, K.; Hesselbach, X. (2018). PaCoVNE: Power Consumption Aware Coordinated VNE with Delay Constraints. En XIII Jornadas de Ingeniería telemática (JITEL 2017). Libro de actas. Editorial Universitat Politècnica de València. 264-271. https://doi.org/10.4995/JITEL2017.2017.6490 ; OCS ; 264 ; 271