Fuzzy logic-based embedded system for video de-interlacing

Abstract

Video de-interlacing algorithms perform a crucial task in video processing. Despite these algorithms are developed using software implementations, their implementations in hardware are required to achieve real-time operation. This paper describes the development of an embedded system for video de-interlacing. The algorithm for video de-interlacing uses three fuzzy logic-based systems to tackle three relevant features in video sequences: motion, edges, and picture repetition. The proposed strategy implements the algorithm as a hardware IP core on a FPGA-based embedded system. The paper details the proposed architecture and the design methodology to develop it. The resulting embedded system is verified on a FPGA development board and it is able to de-interlace in real-time. © 2013 Elsevier B.V. All rights reserved. ; This work was partially supported by MOBY-DIC project FP7-INFSO-ICT-248858 (www.mobydic-project.eu) from EuropeanCommunity, TEC2011-24319 project from the Spanish Govern-ment, and P08-TIC-03674 project from the Andalusian Regional Government (with support from the PO FEDER). P. Brox is supportedunder the post-doctoral program called 'Juan de la Cierva' from theSpanish Ministry of Science and Innovation. ; Peer Reviewed